Staff Engineer – Digital/SoC Design

Innatera is currently staffing its SoC design team which is spread across two locations – Delft, The Netherlands and Bangalore, India. The team is responsible for the architecture development and digital design of Innatera’s neuromorphic processor SoCs, which combine energy-efficient processing elements within a highly scalable, massively parallel compute array. The team is looking to hire multiple, experienced, staff-level engineers to lead the design and development of the digital architecture within Innatera’s upcoming neuromorphic processor SoCs. The ideal candidate has a track record of building complex processor/multi-processor systems in advanced process nodes, has demonstrable technical leadership experience, and has the versatility to function across the architecture development and VLSI design flows.

Positions are available both at Delft, and in Bangalore.

In this role, you will be responsible for

  • Leading a technical team on the RTL design and architecture development of the high-performance digital fabric inside Innatera’s SoC products.
  • Lead the specification, design, optimization, FPGA prototyping, and testing of multi-processor architectures, network-on-chip interconnects, memory hierarchies, and other digital components.
  • Carry out the semi-custom design, tape-out, and validation of the digital sub-systems.
  • Work together with analog-mixed signal design engineers to interface the digital sub-systems with Innatera’s neuromorphic compute elements.
  • Collaborate with a team of hardware architects, digital design engineers, and application engineers.
  • Contributing to the creation of IP (patents, knowhow) at Innatera.

The ideal candidate for this position

  • Has a PhD or MSc, with several years of relevant industrial experience in the semiconductor / SoC / processor / multiprocessor design fields
  • Has demonstrable technical leadership experience
  • Is skilled at leading the RTL design, FPGA prototyping, and semi-custom VLSI design of complex digital SoCs
  • Is experienced with pre- and post-silicon validation
  • Has contributed to the one or more digital tapeouts
  • Is a problem solver, has a goal-oriented attitude, and is highly-motivated
  • Is a self-starter, and is passionate about technology

Preferred skills for this position

  • Mentor Modelsim, Xilinx ISE/Vivado, Synopsys Design Compiler, Cadence Innovus
  • VHDL/Verilog, SystemC
  • C/C++
  • Python, Tcl,…
  • Computer architecture, processor/multiprocessor design, SoC


Delft, The Netherlands and Bangalore, India.

Note: multiple positions are available

To apply for this position, email your CV to with “Staff Engineer – Digital/SoC Design” as the subject.